Commit ce7ce3bb authored by sushrut1101's avatar sushrut1101
Browse files

Add davinci-user 11 RKQ1.200826.002 V12.1.4.0.RFJMIXM release-keys



Signed-off-by: sushrut1101's avatarSushrut1101 <guptasushrut@gmail.com>
parents
## davinci-user 11 RKQ1.200826.002 V12.1.4.0.RFJMIXM release-keys
- Manufacturer: xiaomi
- Platform: sm6150
- Codename: davinci
- Brand: Xiaomi
- Flavor: davinci-user
- Release Version: 11
- Id: RKQ1.200826.002
- Incremental: V12.1.4.0.RFJMIXM
- Tags: release-keys
- CPU Abilist: arm64-v8a,armeabi-v7a,armeabi
- A/B Device: false
- Locale: en-GB
- Screen Density: 440
- Fingerprint: Xiaomi/davinci/davinci:11/RKQ1.200826.002/V12.1.4.0.RFJMIXM:user/release-keys
- OTA version:
- Branch: davinci-user-11-RKQ1.200826.002-V12.1.4.0.RFJMIXM-release-keys
- Repo: xiaomi/davinci
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require version-baseband=4.3.c5-00100-SM6150_GEN_PACK-1
require version-trustzone=TZ.XF.5.0.3-00312
require version-vendor=1627388911
File added
A
\ No newline at end of file
kernel=kernel
ramdisk=ramdisk
page_size=4096
dt=dt.img
kernel_size=22292560
ramdisk_size=0
dtb_size=1
base_addr=0x00000000
kernel_offset=0x00008000
ramdisk_offset=0x00000000
tags_offset=0x00000100
dtbo_offset=0x00000000
cmd_line='console=ttyMSM0,115200n8 androidboot.hardware=qcom androidboot.console=ttyMSM0 androidboot.memcg=1 lpm_levels.sleep_disabled=1 video=vfb:640x400,bpp=32,memsize=3072000 msm_rtb.filter=0x237 service_locator.enable=1 swiotlb=1 androidboot.usbcontroller=a600000.dwc3 earlycon=msm_geni_serial,0x880000 loop.max_part=7 printk.devkmsg=on buildvariant=user'
board=""
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/dts-v1/;
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "qcom,ipq8074-hk01", "qcom,ipq8074";
interrupt-parent = <0x1>;
model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
__symbols__ {
CPU0 = "/cpus/cpu@0";
CPU1 = "/cpus/cpu@1";
CPU2 = "/cpus/cpu@2";
CPU3 = "/cpus/cpu@3";
L2_0 = "/cpus/l2-cache";
blsp1_uart5 = "/soc/serial@78b3000";
gcc = "/soc/gcc@1800000";
intc = "/soc/interrupt-controller@b000000";
serial_4_pins = "/soc/pinctrl@1000000/serial4_pinmux";
sleep_clk = "/clocks/sleep_clk";
soc = "/soc";
xo = "/clocks/xo";
};
aliases {
serial0 = "/soc/serial@78b3000";
};
chosen {
stdout-path = "serial0";
};
clocks {
sleep_clk {
#clock-cells = <0x0>;
clock-frequency = <0x7d00>;
compatible = "fixed-clock";
phandle = <0xb>;
};
xo {
#clock-cells = <0x0>;
clock-frequency = <0x124f800>;
compatible = "fixed-clock";
phandle = <0xc>;
};
};
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
next-level-cache = <0x4>;
phandle = <0x7>;
reg = <0x0>;
};
cpu@1 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
next-level-cache = <0x4>;
phandle = <0x8>;
reg = <0x1>;
};
cpu@2 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
next-level-cache = <0x4>;
phandle = <0x9>;
reg = <0x2>;
};
cpu@3 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
next-level-cache = <0x4>;
phandle = <0xa>;
reg = <0x3>;
};
l2-cache {
cache-level = <0x2>;
compatible = "cache";
phandle = <0x4>;
};
};
memory {
device_type = "memory";
reg = <0x0 0x40000000 0x0 0x20000000>;
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <0x1 0x7 0xf00>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "simple-bus";
phandle = <0x5>;
ranges = <0x0 0x0 0x0 0xffffffff>;
gcc@1800000 {
#clock-cells = <0x1>;
#reset-cells = <0x1>;
compatible = "qcom,gcc-ipq8074";
phandle = <0x2>;
reg = <0x1800000 0x80000>;
};
interrupt-controller@b000000 {
#interrupt-cells = <0x3>;
compatible = "qcom,msm-qgic2";
interrupt-controller;
phandle = <0x1>;
reg = <0xb000000 0x1000 0xb002000 0x1000>;
};
pinctrl@1000000 {
#gpio-cells = <0x2>;
#interrupt-cells = <0x2>;
compatible = "qcom,ipq8074-pinctrl";
gpio-controller;
interrupt-controller;
interrupts = <0x0 0xd0 0x4>;
reg = <0x1000000 0x300000>;
serial4_pinmux {
phandle = <0x3>;
mux {
bias-disable;
function = "blsp4_uart1";
pins = "gpio23", "gpio24";
};
};
};
serial@78b3000 {
clock-names = "core", "iface";
clocks = <0x2 0x26 0x2 0x15>;
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
interrupts = <0x0 0x134 0x4>;
phandle = <0x6>;
pinctrl-0 = <0x3>;
pinctrl-names = "default";
reg = <0x78b3000 0x200>;
status = "ok";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <0x1 0x2 0xf08 0x1 0x3 0xf08 0x1 0x4 0xf08 0x1 0x1 0xf08>;
};
timer@b120000 {
#address-cells = <0x1>;
#size-cells = <0x1>;
clock-frequency = <0x124f800>;
compatible = "arm,armv7-timer-mem";
ranges;
reg = <0xb120000 0x1000>;
frame@b120000 {
frame-number = <0x0>;
interrupts = <0x0 0x8 0x4 0x0 0x7 0x4>;
reg = <0xb121000 0x1000 0xb122000 0x1000>;
};
frame@b123000 {
frame-number = <0x1>;
interrupts = <0x0 0x9 0x4>;
reg = <0xb123000 0x1000>;
status = "disabled";
};
frame@b124000 {
frame-number = <0x2>;
interrupts = <0x0 0xa 0x4>;
reg = <0xb124000 0x1000>;
status = "disabled";
};
frame@b125000 {
frame-number = <0x3>;
interrupts = <0x0 0xb 0x4>;
reg = <0xb125000 0x1000>;
status = "disabled";
};
frame@b126000 {
frame-number = <0x4>;
interrupts = <0x0 0xc 0x4>;
reg = <0xb126000 0x1000>;
status = "disabled";
};
frame@b127000 {
frame-number = <0x5>;
interrupts = <0x0 0xd 0x4>;
reg = <0xb127000 0x1000>;
status = "disabled";
};
frame@b128000 {
frame-number = <0x6>;
interrupts = <0x0 0xe 0x4>;
reg = <0xb128000 0x1000>;
status = "disabled";
};
};
};
};
/dts-v1/;
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "huawei,angler", "qcom,msm8994";
interrupt-parent = <0x1>;
model = "Huawei Nexus 6P";
qcom,board-id = <0x1f5a 0x0>;
qcom,msm-id = <0xcf 0x20000>;
qcom,pmic-id = <0x10009 0x1000a 0x0 0x0>;
__symbols__ {
CPU0 = "/cpus/cpu@0";
L2_0 = "/cpus/cpu@0/l2-cache";
blsp1_uart2 = "/soc/serial@f991e000";
blsp1_uart2_default = "/soc/pinctrl@fd510000/blsp1_uart2_default";
blsp1_uart2_sleep = "/soc/pinctrl@fd510000/blsp1_uart2_sleep";
clock_gcc = "/soc/clock-controller@fc400000";
intc = "/soc/interrupt-controller@f9000000";
msmgpio = "/soc/pinctrl@fd510000";
sleep_clk = "/sleep_clk";
smem_mem = "/reserved-memory/smem_region@6a00000";
soc = "/soc";
tcsr_mutex = "/hwlock";
tcsr_mutex_regs = "/soc/syscon@fd484000";
xo_board = "/xo_board";
};
aliases {
serial0 = "/soc/serial@f991e000";
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu-map {
cluster0 {
core0 {
cpu = <0x2>;
};
};
};
cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
next-level-cache = <0x3>;
phandle = <0x2>;
reg = <0x0>;
l2-cache {
cache-level = <0x2>;
compatible = "cache";
phandle = <0x3>;
};
};
};
hwlock {
#hwlock-cells = <0x1>;
compatible = "qcom,tcsr-mutex";
phandle = <0x9>;
syscon = <0x7 0x0 0x80>;
};
memory {
device_type = "memory";
reg = <0x0 0x0 0x0 0x0>;
};
qcom,smem@6a00000 {
compatible = "qcom,smem";
hwlocks = <0x9 0x3>;
memory-region = <0x8>;
};
reserved-memory {
#address-cells = <0x2>;
#size-cells = <0x2>;
ranges;
smem_region@6a00000 {
no-map;
phandle = <0x8>;
reg = <0x0 0x6a00000 0x0 0x200000>;
};
};
sleep_clk {
#clock-cells = <0x0>;
clock-frequency = <0x8000>;
compatible = "fixed-clock";
phandle = <0xe>;
};
soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "simple-bus";
phandle = <0xa>;
ranges = <0x0 0x0 0x0 0xffffffff>;
clock-controller@fc400000 {
#clock-cells = <0x1>;
#power-domain-cells = <0x1>;
#reset-cells = <0x1>;
compatible = "qcom,gcc-msm8994";
phandle = <0x4>;
reg = <0xfc400000 0x2000>;
};
interrupt-controller@f9000000 {
#interrupt-cells = <0x3>;
compatible = "qcom,msm-qgic2";
interrupt-controller;
phandle = <0x1>;
reg = <0xf9000000 0x1000 0xf9002000 0x1000>;
};
pinctrl@fd510000 {
#gpio-cells = <0x2>;
#interrupt-cells = <0x2>;
compatible = "qcom,msm8994-pinctrl";
gpio-controller;
interrupt-controller;
interrupts = <0x0 0xd0 0x4>;
phandle = <0xb>;
reg = <0xfd510000 0x4000>;
blsp1_uart2_default {
phandle = <0x5>;
pinconf {
bias-disable;
drive-strength = <0x10>;
pins = "gpio4", "gpio5";
};
pinmux {
function = "blsp_uart2";
pins = "gpio4", "gpio5";
};
};
blsp1_uart2_sleep {
phandle = <0x6>;
pinconf {
bias-pull-down;
drive-strength = <0x2>;
pins = "gpio4", "gpio5";
};
pinmux {
function = "gpio";
pins = "gpio4", "gpio5";
};
};
};
restart@fc4ab000 {
compatible = "qcom,pshold";
reg = <0xfc4ab000 0x4>;
};
serial@f991e000 {
clock-names = "core", "iface";
clocks = <0x4 0x48 0x4 0x3a>;
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
interrupts = <0x0 0x6c 0x4>;
phandle = <0xc>;
pinctrl-0 = <0x5>;
pinctrl-1 = <0x6>;
pinctrl-names = "default", "sleep";
reg = <0xf991e000 0x1000>;
status = "okay";
};
syscon@fd484000 {
compatible = "syscon";
phandle = <0x7>;
reg = <0xfd484000 0x2000>;
};
timer@f9020000 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "arm,armv7-timer-mem";
ranges;
reg = <0xf9020000 0x1000>;
frame@f9021000 {
frame-number = <0x0>;
interrupts = <0x0 0x9 0x4 0x0 0x8 0x4>;
reg = <0xf9021000 0x1000 0xf9022000 0x1000>;
};
frame@f9023000 {
frame-number = <0x1>;
interrupts = <0x0 0xa 0x4>;
reg = <0xf9023000 0x1000>;
status = "disabled";
};
frame@f9024000 {
frame-number = <0x2>;
interrupts = <0x0 0xb 0x4>;
reg = <0xf9024000 0x1000>;
status = "disabled";
};
frame@f9025000 {
frame-number = <0x3>;
interrupts = <0x0 0xc 0x4>;
reg = <0xf9025000 0x1000>;
status = "disabled";
};
frame@f9026000 {
frame-number = <0x4>;
interrupts = <0x0 0xd 0x4>;
reg = <0xf9026000 0x1000>;
status = "disabled";
};
frame@f9027000 {
frame-number = <0x5>;
interrupts = <0x0 0xe 0x4>;
reg = <0xf9027000 0x1000>;
status = "disabled";
};
frame@f9028000 {
frame-number = <0x6>;
interrupts = <0x0 0xf 0x4>;
reg = <0xf9028000 0x1000>;
status = "disabled";
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <0x1 0x2 0xff08 0x1 0x3 0xff08 0x1 0x4 0xff08 0x1 0x1 0xff08>;
};
xo_board {
#clock-cells = <0x0>;
clock-frequency = <0x124f800>;
compatible = "fixed-clock";
phandle = <0xd>;
};
};
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/dts-v1/;
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "lg,bullhead", "qcom,msm8992";
interrupt-parent = <0x1>;
model = "LG Nexus 5X";
qcom,board-id = <0xb64 0x0>;
qcom,msm-id = <0xfb 0x0 0xfc 0x0>;
qcom,pmic-id = <0x10009 0x1000a 0x0 0x0>;
__symbols__ {
CPU0 = "/cpus/cpu@0";
L2_0 = "/cpus/cpu@0/l2-cache";
apcs = "/soc/syscon@f900d000";
blsp1_uart2 = "/soc/serial@f991e000";
blsp1_uart2_default = "/soc/pinctrl@fd510000/blsp1_uart2_default";
blsp1_uart2_sleep = "/soc/pinctrl@fd510000/blsp1_uart2_sleep";
clock_gcc = "/soc/clock-controller@fc400000";
intc = "/soc/interrupt-controller@f9000000";
msmgpio = "/soc/pinctrl@fd510000";
rpm_msg_ram = "/soc/memory@fc428000";
sfpb_mutex = "/hwmutex";
sfpb_mutex_regs = "/soc/syscon@fd484000";
sleep_clk = "/sleep_clk";
smem_region = "/reserved-memory/smem@6a00000";
vreg_vph_pwr = "/vreg-vph-pwr";
xo_board = "/xo_board";
};
aliases {
serial0 = "/soc/serial@f991e000";
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
cpu-map {
cluster0 {